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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_hw_icap___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_hw_icap.html">XHwIcap</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> driver instance data.  <a href="struct_x_hw_icap.html#details">More...</a><br/></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga52f19423a8a68df00cec1517428d8cf7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga52f19423a8a68df00cec1517428d8cf7">PCAP_CR_OFFSET</a>&#160;&#160;&#160;0xFFCA3008</td></tr>
<tr class="memdesc:ga52f19423a8a68df00cec1517428d8cf7"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCAP CR Register.  <a href="group__hwicap.html#ga52f19423a8a68df00cec1517428d8cf7">More...</a><br/></td></tr>
<tr class="separator:ga52f19423a8a68df00cec1517428d8cf7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga578d555615b032cd9675c91f60dfb2bd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga578d555615b032cd9675c91f60dfb2bd">XHwIcap_FifoWrite</a>(InstancePtr, Data)</td></tr>
<tr class="memdesc:ga578d555615b032cd9675c91f60dfb2bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write data to the Write FIFO.  <a href="group__hwicap.html#ga578d555615b032cd9675c91f60dfb2bd">More...</a><br/></td></tr>
<tr class="separator:ga578d555615b032cd9675c91f60dfb2bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab24c5878ebb17d6bb12e6e6f00a70ccc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gab24c5878ebb17d6bb12e6e6f00a70ccc">XHwIcap_FifoRead</a>(InstancePtr)&#160;&#160;&#160;(<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="el" href="group__hwicap.html#ga880c301214287dc0231e142662bba24c">XHI_RF_OFFSET</a>))</td></tr>
<tr class="memdesc:gab24c5878ebb17d6bb12e6e6f00a70ccc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read data from the Read FIFO.  <a href="group__hwicap.html#gab24c5878ebb17d6bb12e6e6f00a70ccc">More...</a><br/></td></tr>
<tr class="separator:gab24c5878ebb17d6bb12e6e6f00a70ccc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga55440f403fc15d562124e9abe8ddbc61"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga55440f403fc15d562124e9abe8ddbc61">XHwIcap_SetSizeReg</a>(InstancePtr, Data)</td></tr>
<tr class="memdesc:ga55440f403fc15d562124e9abe8ddbc61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the number of words to be read from the Icap in the Size register.  <a href="group__hwicap.html#ga55440f403fc15d562124e9abe8ddbc61">More...</a><br/></td></tr>
<tr class="separator:ga55440f403fc15d562124e9abe8ddbc61"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae175cdfd7a3fd2a9c0a68c1e4968572f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gae175cdfd7a3fd2a9c0a68c1e4968572f">XHwIcap_GetControlReg</a>(InstancePtr)&#160;&#160;&#160;(<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="el" href="group__hwicap.html#gad7d94ec59e14347684d309b0b6406ab2">XHI_CR_OFFSET</a>))</td></tr>
<tr class="memdesc:gae175cdfd7a3fd2a9c0a68c1e4968572f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the Control register.  <a href="group__hwicap.html#gae175cdfd7a3fd2a9c0a68c1e4968572f">More...</a><br/></td></tr>
<tr class="separator:gae175cdfd7a3fd2a9c0a68c1e4968572f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac688a85edeec278c8b0c88d00268e19e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gac688a85edeec278c8b0c88d00268e19e">XHwIcap_StartConfig</a>(InstancePtr)</td></tr>
<tr class="memdesc:gac688a85edeec278c8b0c88d00268e19e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Control Register to initiate a configuration (write) to the device.  <a href="group__hwicap.html#gac688a85edeec278c8b0c88d00268e19e">More...</a><br/></td></tr>
<tr class="separator:gac688a85edeec278c8b0c88d00268e19e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1d43f1b9f75258d0b29b1877a107536b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga1d43f1b9f75258d0b29b1877a107536b">XHwIcap_StartReadBack</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga1d43f1b9f75258d0b29b1877a107536b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Control Register to initiate a ReadBack from the device.  <a href="group__hwicap.html#ga1d43f1b9f75258d0b29b1877a107536b">More...</a><br/></td></tr>
<tr class="separator:ga1d43f1b9f75258d0b29b1877a107536b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga656dcfd3edf2dd7e5733af4db36bf69c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga656dcfd3edf2dd7e5733af4db36bf69c">XHwIcap_GetStatusReg</a>(InstancePtr)&#160;&#160;&#160;(<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>(((InstancePtr)-&gt;HwIcapConfig.BaseAddress), <a class="el" href="group__hwicap.html#gad582c2c3fe5aa1d83b43dc7a0d243da8">XHI_SR_OFFSET</a>))</td></tr>
<tr class="memdesc:ga656dcfd3edf2dd7e5733af4db36bf69c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the status register.  <a href="group__hwicap.html#ga656dcfd3edf2dd7e5733af4db36bf69c">More...</a><br/></td></tr>
<tr class="separator:ga656dcfd3edf2dd7e5733af4db36bf69c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6515e336f30e4f6b3285035a7f939567"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga6515e336f30e4f6b3285035a7f939567">XHwIcap_IsTransferDone</a>(InstancePtr)&#160;&#160;&#160;((InstancePtr-&gt;IsTransferInProgress) ? FALSE : TRUE)</td></tr>
<tr class="memdesc:ga6515e336f30e4f6b3285035a7f939567"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro checks if the last Read/Write of the data to the Read/Write FIFO of the HwIcap device is completed.  <a href="group__hwicap.html#ga6515e336f30e4f6b3285035a7f939567">More...</a><br/></td></tr>
<tr class="separator:ga6515e336f30e4f6b3285035a7f939567"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac1d1213b70d3c503aa0ccd27c0a57857"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gac1d1213b70d3c503aa0ccd27c0a57857">XHwIcap_IsDeviceBusy</a>(InstancePtr)</td></tr>
<tr class="memdesc:gac1d1213b70d3c503aa0ccd27c0a57857"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro checks if the last Read/Write to the ICAP device in the FPGA is completed.  <a href="group__hwicap.html#gac1d1213b70d3c503aa0ccd27c0a57857">More...</a><br/></td></tr>
<tr class="separator:gac1d1213b70d3c503aa0ccd27c0a57857"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa952277368fc2024057861071922661f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaa952277368fc2024057861071922661f">XHwIcap_IntrGlobalEnable</a>(InstancePtr)</td></tr>
<tr class="memdesc:gaa952277368fc2024057861071922661f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro enables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is enabled.  <a href="group__hwicap.html#gaa952277368fc2024057861071922661f">More...</a><br/></td></tr>
<tr class="separator:gaa952277368fc2024057861071922661f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad2dd5620c4ac7d9dee393f4e38446685"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gad2dd5620c4ac7d9dee393f4e38446685">XHwIcap_IntrGlobalDisable</a>(InstancePtr)</td></tr>
<tr class="memdesc:gad2dd5620c4ac7d9dee393f4e38446685"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro disables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is disabled.  <a href="group__hwicap.html#gad2dd5620c4ac7d9dee393f4e38446685">More...</a><br/></td></tr>
<tr class="separator:gad2dd5620c4ac7d9dee393f4e38446685"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ea29151eef34461b2a964bba048c22f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga9ea29151eef34461b2a964bba048c22f">XHwIcap_IntrGetStatus</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga9ea29151eef34461b2a964bba048c22f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro returns the interrupt status read from Interrupt Status Register(IPISR).  <a href="group__hwicap.html#ga9ea29151eef34461b2a964bba048c22f">More...</a><br/></td></tr>
<tr class="separator:ga9ea29151eef34461b2a964bba048c22f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd39ee74d909817a0ecd1d5145f36920"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gadd39ee74d909817a0ecd1d5145f36920">XHwIcap_IntrDisable</a>(InstancePtr, IntrMask)</td></tr>
<tr class="memdesc:gadd39ee74d909817a0ecd1d5145f36920"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro disables the specified interrupts in the Interrupt Enable Register.  <a href="group__hwicap.html#gadd39ee74d909817a0ecd1d5145f36920">More...</a><br/></td></tr>
<tr class="separator:gadd39ee74d909817a0ecd1d5145f36920"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf5d9b150a34fa3759415531b833f81a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gabf5d9b150a34fa3759415531b833f81a">XHwIcap_IntrEnable</a>(InstancePtr, IntrMask)</td></tr>
<tr class="memdesc:gabf5d9b150a34fa3759415531b833f81a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro enables the specified interrupts in the Interrupt Enable Register.  <a href="group__hwicap.html#gabf5d9b150a34fa3759415531b833f81a">More...</a><br/></td></tr>
<tr class="separator:gabf5d9b150a34fa3759415531b833f81a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga50e8cae31685b6c7e2bb880fd1138209"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga50e8cae31685b6c7e2bb880fd1138209">XHwIcap_IntrGetEnabled</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga50e8cae31685b6c7e2bb880fd1138209"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro returns the interrupt status read from Interrupt Enable Register(IIER).  <a href="group__hwicap.html#ga50e8cae31685b6c7e2bb880fd1138209">More...</a><br/></td></tr>
<tr class="separator:ga50e8cae31685b6c7e2bb880fd1138209"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga161e6cb1deac088c298c11c6400da295"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga161e6cb1deac088c298c11c6400da295">XHwIcap_IntrClear</a>(InstancePtr, IntrMask)</td></tr>
<tr class="memdesc:ga161e6cb1deac088c298c11c6400da295"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro clears the specified interrupts in the Interrupt Status Register (IPISR).  <a href="group__hwicap.html#ga161e6cb1deac088c298c11c6400da295">More...</a><br/></td></tr>
<tr class="separator:ga161e6cb1deac088c298c11c6400da295"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada2fee3cdacf928be46488879f32bf8a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gada2fee3cdacf928be46488879f32bf8a">XHwIcap_GetWrFifoVacancy</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress, <a class="el" href="group__hwicap.html#ga2d5e8341edaacfbd2e50e6d348ad8131">XHI_WFV_OFFSET</a>)</td></tr>
<tr class="memdesc:gada2fee3cdacf928be46488879f32bf8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro returns the vacancy of the Write FIFO.  <a href="group__hwicap.html#gada2fee3cdacf928be46488879f32bf8a">More...</a><br/></td></tr>
<tr class="separator:gada2fee3cdacf928be46488879f32bf8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5372c712425f6f8c3cc116a79f29cf3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaa5372c712425f6f8c3cc116a79f29cf3">XHwIcap_GetRdFifoOccupancy</a>(InstancePtr)&#160;&#160;&#160;<a class="el" href="group__hwicap.html#ga7061e53605486f268a5e2205828d5921">XHwIcap_ReadReg</a>((InstancePtr)-&gt;HwIcapConfig.BaseAddress, <a class="el" href="group__hwicap.html#ga9bc6d60763a4589772fbab9611444a76">XHI_RFO_OFFSET</a>)</td></tr>
<tr class="memdesc:gaa5372c712425f6f8c3cc116a79f29cf3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro returns the occupancy of the Read FIFO.  <a href="group__hwicap.html#gaa5372c712425f6f8c3cc116a79f29cf3">More...</a><br/></td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:gac66fc3c032512dfc47f97bc87d97ca4b"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gac66fc3c032512dfc47f97bc87d97ca4b">XHwIcap_StatusHandler</a> )(void *CallBackRef, u32 StatusEvent, u32 WordCount)</td></tr>
<tr class="memdesc:gac66fc3c032512dfc47f97bc87d97ca4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The handler data type allows the user to define a callback function to handle the asynchronous processing of the HwIcap driver.  <a href="group__hwicap.html#gac66fc3c032512dfc47f97bc87d97ca4b">More...</a><br/></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:gad497b5129aff666181e85457f1c5f678"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gad497b5129aff666181e85457f1c5f678">XHwIcap_CfgInitialize</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, <a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a> *ConfigPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:gad497b5129aff666181e85457f1c5f678"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes a specific <a class="el" href="struct_x_hw_icap.html" title="The XHwIcap driver instance data. ">XHwIcap</a> instance.  <a href="group__hwicap.html#gad497b5129aff666181e85457f1c5f678">More...</a><br/></td></tr>
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<tr class="memitem:gaab446328af0c5b397eeaee15088bf8e8"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">XHwIcap_DeviceWrite</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, u32 *FrameBuffer, u32 NumWords)</td></tr>
<tr class="memdesc:gaab446328af0c5b397eeaee15088bf8e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function writes the given user data to the Write FIFO in both the polled mode and the interrupt mode and starts the transfer of the data to the ICAP device.  <a href="group__hwicap.html#gaab446328af0c5b397eeaee15088bf8e8">More...</a><br/></td></tr>
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<tr class="memitem:ga27e9ac291323ef043303367460b70de0"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">XHwIcap_DeviceRead</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, u32 *FrameBuffer, u32 NumWords)</td></tr>
<tr class="memdesc:ga27e9ac291323ef043303367460b70de0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads the specified number of words from the ICAP device in the polled mode.  <a href="group__hwicap.html#ga27e9ac291323ef043303367460b70de0">More...</a><br/></td></tr>
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<tr class="memitem:ga6c516a5e0cb9f928e591a152cd567dca"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga6c516a5e0cb9f928e591a152cd567dca">XHwIcap_Reset</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga6c516a5e0cb9f928e591a152cd567dca"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function forces the software reset of the complete HWICAP device.  <a href="group__hwicap.html#ga6c516a5e0cb9f928e591a152cd567dca">More...</a><br/></td></tr>
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<tr class="memitem:ga92dbad9de7f4a4e41fcde30fc2ebda1c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga92dbad9de7f4a4e41fcde30fc2ebda1c">XHwIcap_FlushFifo</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga92dbad9de7f4a4e41fcde30fc2ebda1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function flushes the FIFOs in the device.  <a href="group__hwicap.html#ga92dbad9de7f4a4e41fcde30fc2ebda1c">More...</a><br/></td></tr>
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<tr class="memitem:ga2493ca18331cba6eb2162449b7dab66e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga2493ca18331cba6eb2162449b7dab66e">XHwIcap_Abort</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga2493ca18331cba6eb2162449b7dab66e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initiates the Abort Sequence by setting the Abort bit in the control register.  <a href="group__hwicap.html#ga2493ca18331cba6eb2162449b7dab66e">More...</a><br/></td></tr>
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<tr class="memitem:gadead7aef30c83eb98380b986884b0e6f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_hw_icap___config.html">XHwIcap_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gadead7aef30c83eb98380b986884b0e6f">XHwIcap_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:gadead7aef30c83eb98380b986884b0e6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Looks up the device configuration based on the unique device ID.  <a href="group__hwicap.html#gadead7aef30c83eb98380b986884b0e6f">More...</a><br/></td></tr>
<tr class="separator:gadead7aef30c83eb98380b986884b0e6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c4b2410acc62af539dac03005668754"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga7c4b2410acc62af539dac03005668754">XHwIcap_CommandDesync</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga7c4b2410acc62af539dac03005668754"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sends a DESYNC command to the ICAP port.  <a href="group__hwicap.html#ga7c4b2410acc62af539dac03005668754">More...</a><br/></td></tr>
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<tr class="memitem:gaff2a2db509296264ad44270798b4bed2"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaff2a2db509296264ad44270798b4bed2">XHwIcap_CommandCapture</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaff2a2db509296264ad44270798b4bed2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sends a CAPTURE command to the ICAP port.  <a href="group__hwicap.html#gaff2a2db509296264ad44270798b4bed2">More...</a><br/></td></tr>
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<tr class="memitem:ga305707eb013da39d038183c7f0d8fed9"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">XHwIcap_GetConfigReg</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, u32 ConfigReg, u32 *RegData)</td></tr>
<tr class="memdesc:ga305707eb013da39d038183c7f0d8fed9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the value of the specified configuration register.  <a href="group__hwicap.html#ga305707eb013da39d038183c7f0d8fed9">More...</a><br/></td></tr>
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<tr class="memitem:ga0716d6a3c65aabb73344bee9c4c9cfc7"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">XHwIcap_SelfTest</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga0716d6a3c65aabb73344bee9c4c9cfc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Run a self-test on the driver/device.  <a href="group__hwicap.html#ga0716d6a3c65aabb73344bee9c4c9cfc7">More...</a><br/></td></tr>
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<tr class="memitem:ga9cf1ff1dd1056a11f65a903c47492842"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">XHwIcap_IntrHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:ga9cf1ff1dd1056a11f65a903c47492842"><td class="mdescLeft">&#160;</td><td class="mdescRight">The interrupt handler for HwIcap interrupts.  <a href="group__hwicap.html#ga9cf1ff1dd1056a11f65a903c47492842">More...</a><br/></td></tr>
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<tr class="memitem:gaa2f2f23cf842c10f443509f8861a194a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gaa2f2f23cf842c10f443509f8861a194a">XHwIcap_SetInterruptHandler</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, void *CallBackRef, <a class="el" href="group__hwicap.html#gac66fc3c032512dfc47f97bc87d97ca4b">XHwIcap_StatusHandler</a> FuncPtr)</td></tr>
<tr class="memdesc:gaa2f2f23cf842c10f443509f8861a194a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to the higher layer software.  <a href="group__hwicap.html#gaa2f2f23cf842c10f443509f8861a194a">More...</a><br/></td></tr>
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<tr class="memitem:gafdb7b9947a1e1610a214814c1b19a0a1"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#gafdb7b9947a1e1610a214814c1b19a0a1">XHwIcap_DeviceReadFrame</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, long Top, long Block, long HClkRow, long MajorFrame, long MinorFrame, u32 *FrameBuffer)</td></tr>
<tr class="memdesc:gafdb7b9947a1e1610a214814c1b19a0a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads one frame from the device and puts it in memory specified by the user.  <a href="group__hwicap.html#gafdb7b9947a1e1610a214814c1b19a0a1">More...</a><br/></td></tr>
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<tr class="memitem:ga7b2b996ebb5c5268a07d39e9add552dc"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hwicap.html#ga7b2b996ebb5c5268a07d39e9add552dc">XHwIcap_DeviceWriteFrame</a> (<a class="el" href="struct_x_hw_icap.html">XHwIcap</a> *InstancePtr, long Top, long Block, long HClkRow, long MajorFrame, long MinorFrame, u32 *FrameData)</td></tr>
<tr class="memdesc:ga7b2b996ebb5c5268a07d39e9add552dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes one frame from the specified buffer and puts it in the device (ICAP).  <a href="group__hwicap.html#ga7b2b996ebb5c5268a07d39e9add552dc">More...</a><br/></td></tr>
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